Keynote Speakers

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Jan M. Rabaey

Professor

Electrical Engineering and Computer Science department at UC Berkeley

www.eecs.berkeley.edu

The Return of Neuro-Inspired Computing – Why Now?

Abstract:

There is no question that Moore’s Law (as we know it) is approaching its end game. Continued scaling of technology is getting harder and the benefits are smaller. It is hard to see how traditional designs such as digital processors or memories will benefit much in terms of cost, performance and energy once the 12-10 nm nodes are reached. Variability, leakage and decreasing reliability will make it hard if not impossible to sustain the current design philosophies.

Barring technologies surprises (such as the discovery of a perfect nanometer switch), alternative design strategies may be necessary if continued scaling of functionality in terms of size and energy is to be obtained. Neuro-inspired computing is one possible direction to be considered. Over the past decade, the brain has been receiving a lot of attention (e.g. the BRAIN initiatives in the US and Europe) – mostly from a mapping and an understanding perspective. The brain is an amazingly complex and efficient machine. While it may not be considered “general purpose” in terms of its computational capabilities, it performs a set of functions such as feature extraction, classification, synthesis, recognition, learning, and higher-order decision-making amazingly well. Carver Mead already realized this in the late 1980’s – yet the technological landscape at that time was not amenable to make neuromorphic computing an attractive alternative.

Today, it is realized that neuro-inspired computing may be a perfect match to the properties of the emerging nano-scale devices (such as 3D integration, carbon and spin devices, non-volatile memory cells such as RRAM, etc): it thrives on randomness and variability, processing is performed in the continuous or discrete domains, and massive parallelism, major redundancy and adaptivity are of essence. Computational paradigms inspired by neural information processing hence may lead to energy-efficient, low-cost, dense and/or reliable implementations of the functions the brain excels at. In this presentation, we will explore various means on how the interaction between neuroscience and information technology may lead to an exciting future.

Biography:

He received the EE and Ph.D. degrees in Applied Sciences from the Katholieke Universiteit Leuven, Belgium, in 1978 and 1983 respectively. From 1983-1985, he was a Visiting Research Engineer at UC Berkeley. From 1985-1987, he was a research manager at IMEC, Belgium, and in 1987, joined the faculty of the Electrical Engineering and Computer Science department at UC Berkeley, where he is now holds the Donald O. Pederson Distinguished Professorship. He has been a visiting professor at the University of Pavia (Italy), Waseda University (Japan), the Technical University Delft (Netherlands), Victoria Technical University and the University of New South Wales (Australia). He was the Associate Chair (EE) of the EECS Dept. at Berkeley from 1999 until 2002 and is currently the Scientific co-director of the Berkeley Wireless Research Center (BWRC), as well as the director of the Multiscale Systems Research Center (MuSyC). Professor Rabaey has authored or co-authored a wide range of papers in the area of signal processing and design automation. He has received numerous scientific awards, including the 1985 IEEE Transactions on Computer Aided Design Best Paper Award (Circuits and Systems Society), the 1989 Presidential Young Investigator award, and the 1994 Signal Processing Society Senior Award. In 1995, he became an IEEE Fellow. He has also been awarded the 2002 ISSCC Jack Raper Award, the 2008 IEEE Circuits and Systems Mac Van Valkenburg Award, the 2009 EDAA Lifetime Achievement Award, and the 2010 Semiconductor Industry Association University Researcher Award. In 2011, he was elected to the Royal Flemish Academy of Arts and Sciences (Belgium). He is past Chair of the VLSI Signal Processing Technical Committee of the Signal Processing Society and has chaired the executive committee of the Design Automation Conference. He serves on the Technical Advisory Boards of a wide range of companies.

Link to personal webpage

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Joseph Sylvester Chang

Associate Professor

NTU, Singapore

http://research.ntu.edu.sg

Printed Digital Electronics on Flexible Substrates: Challenges and Applications

Abstract:

Printed Electronics, also known as Organic Electronics, is an emerging technology and often touted as ‘Electronics Everywhere’, a printing press that can produce electronics on-demand, inexpensively, and on flexible substrates (e.g. plastic films so that it can be bent and fitted into odd places). It is likely to be complementary to silicon because it is largely limited to low speed applications (due to low semiconductor carrier mobility), and is projected to grow from $3B today to $50B within a decade – potentially a gargantuan market.

The printing of printed electronics can generally be classified into ‘subtractive’ and ‘additive’ processes. The former largely leverages on IC fabrication technology, hence the associated expensive printing and infrastructure, thereby arguably contravening much of said touted attributes of printed electronics. The latter, on the other hand, is typically based on print-media technology and, in many cases, offers much of said attributes although performance of the printed circuits thereto is somewhat compromised. Independent of the printing process, very few printed electronics circuits, at this juncture, embody sophistication of note, including analog, mixed-signal and digital circuits.

In this talk, the complete supply chain of printed electronics will be delineated, including the challenges of each supply chain to the realization of analog, mixed-signal and digital circuits printed electronics. A fully-additive printing process developed at NTU will also be presented – arguably to-date the only additive process capable of realizing complete electronic circuits, and featuring the highest carrier mobility of all reported fully-additive processes; equivalent to state-of-the-art subtractive processes. Several fully-additive printed circuits will be demonstrated. In the context of digital circuits, this talk will argue the merits of asynchronous-logic over synchronous-logic for printed electronics, and discuss the ensuing compromises.

Biography:

Joseph Chang received the PhD degree from the Department of Otolaryngology, Faculty of Medicine, The University of Melbourne, Australia. He is presently with the School of Electrical and Electronics Engineering, Nanyang Technological University (NTU), Singapore, and is adjunct at the Texas A&M University (USA). He was the former Associate Dean (Research and Graduate Studies), College of Engineering, NTU.

He has received numerous research grants, exceeding US$10M, including from DARPA (USA), European Union, industrial grants from multinational corporations, Singapore’s Defense, A*STAR, MoE, etc. He has active research international collaborations, including with the California Institute of Technology (Caltech), Massachusetts Institute of Technology (MIT) and Weill Medical College, Cornell University. He has founded two start-ups and has commercialized several devices.

He is active in professional societies, including having served as General Chair of several IEEE-NIH (National Institutes of Health, USA) and international conferences/workshops. He was a Guest Editor of the Proceedings of the IEEE for a special issue on Computational Systems Biology, Guest Editor for the IEEE Circuits and Systems Magazine for a special issue on Life Sciences, the Editor of the Open Column (IEEE Circuits and Systems magazine), and associate editor of the IEEE Transactions of Circuits and Systems-I and -II journals. He has also served as Chair/President of IEEE Technical Committees and is currently an IEEE Distinguished Lecturer.

His research interests include bioengineering, audiology, psychoacoustics, and analog and digital circuit designs in silicon, III-V and printed electronics on flexible substrates.

Link to personal webpage

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Paul D. Mitcheson

Lecturer in the Control and Power Research Group

Imperial College London, UK

www3.imperial.ac.uk

RF Energy Harvesting and Inductive Power Transfer

Abstract:

In this talk I will discuss two methods of powering devices using wireless power - Harvesting RF energy and inductive power transfer. Both technologies are receiving increased interest from the academic community and industry due to their enormous potential: applications that include powering wireless sensors, medical devices and charging electric vehicles. RF energy harvesting is typically capable of providing only a few microwatts, but inductive power transfer can operate at the kW level. I will discuss the current state of the art and cover the work we are conducting at Imperial College on these two technologies.

Biography:

Paul D. Mitcheson received the M.Eng. degree in electrical and electronic engineering and the Ph.D. degree from Imperial College London, U.K., in 2001 and 2005, respectively. He became a Lecturer (Assistant Professor) at Imperial College in 2006 and is currently a Senior Lecturer (Associate Professor) in the Control and Power Research Group, Electrical and Electronic Engineering Department at Imperial College London. He has research interests in energy harvesting devices, in particular the power processing requirements for harvester powered systems, including RF energy harvesting. He has a parallel line of work, which also concerns getting power to "hard to reach" places, on investigating inductive power transfer. He was general co-chair of PowerMEMS 2013 at the Royal Society in London.

Link to personal webpage